The development of semiconductor devices has led to the increase in the memory capacity of semiconductor chips, the number of I/O terminals signal computing speed, electric power consumption and the demand of higher mounting density.
Upon following the trend of large scale integration of the semiconductor chip, the number of leads has been increased and therefore the size of leads has been reduced. As a result it requires the various modification in packaging, semiconductor fabricating process.
The increase in the signal computing speed and electric power consumption leads to production of much heat in the semiconductor chips themselves. For heat radiation, a heat sink was separately installed in the body of the semiconductor packages from the highly heat-conductive material or the body of the semiconductor package was made from the highly heat-conductive material.
Furthermore, multi-layer packaging method and chip on board (COB) method, which is directly mounted on the PCB have been developed.
In general, the semiconductor package is widely used wherein semiconductor chips mounted on the die pad of lead frame and then package body is formed with molding materials. This molding type semiconductor package is divided into the horizontal and vertical mounting type.
The horizontal mounting type package is used in the thin memory card or the small personal computer and so on. And it is divided into SIP (single in line package) type where leads projects to one side of the body, DIP (dual in line package) and SOP (small out line package) type where leads projects to two sides of the body, and QFP (quad flat package) type where leads project to four sides all.
Besides, when the instrument needs lighter weight, larger capacity, and more speed to try to make the board be small by utilizing its space that components with various height coexist, the vertical mounting type package in which mounting method of semiconductor chips is mainly used like lead on chip (LOC) or chip on board (COL) is recently being watched with keen interest.
FIGS. 1A, 1B, and 1C are respectively a front, side and plane view showing a preferred embodiment of the vertical mounting type package according to the prior art.
Examples of the previous vertical mounting type package are described in U.S. Pat. No. 4,266,282 and 4,426,689. Referring to FIG. 1, among these the vertical packages (VPAK) has external leads 12 which are connected with semiconductor chips (not showed here) extended and banded to a direction on the one side of the package body 13 formed with molding material of epoxy molding compound (EMC) and so on.
Studs 14 to fix and support the package body 13 in mounting VPAK 10 is formed at the both sides of the package body 13. As shown in FIG. 2, studs 14 which are inserted in perforating holes 16 fix VPAK (10) and the down side of external bent leads 12 is vertically mounted soldered with the land pattern which is connected to the circuit formed on PCB 15.
Like above, VPAK which is mounted inserted in PCB has the problem that it has a difficulty in mounting both sides, forming multi-layer metallization, and performing batch reflow with other components. Especially, it has the shortcoming that perforating holes must be formed to fix studs on PCB.
FIGS. 3A, 3B, and 3C show the vertical surface mount package 20 (VSMP) which is developed by NEC Corporation to solve the problem. External leads 22 which are connected with semiconductor chip 21 are collectively extended from one side and unidirectionally bent.
Supporting leads 24 are more extended than the external leads 23 at both external sides and bent in zigzag type, that is, in `L` type to support them in the vertical mounting of VSMP 20. Referring to FIG. 4, VSMP 20 is mounted by soldering the base of external leads 22 and supporting leads 24 on the land patterns (not shown here) which are connected with printed patterns on PCB 25 (not shown here).
Accordingly, the VSMP 20 has widely used owing to the merit of the possibility of high-density mounting and multi-layer metallization of PCB since it is a kind of surface mount package, both-side mounting on PCB, and batch reflow with other components of above external leads 23.
Moreover, in the prior vertically mounting type semiconductor package like the above-mentioned VPAK and VSMP, high integration of the semiconductor chip has led to increase in the number of I/O terminals of leads and therefore to requires the decrease in the distance of leads to 0.3 mm.
This fine pitch bring the semiconductor package to the low reliability problem that solder bridging phenomena due to the soldering equipment error in soldering process or the production error of semiconductor package and land patterns, or that noise due to the induction current between adjacent external leads occurs.